Physical Design Engineer - Power Grid/EMIR

Tenstorrent is seeking a passionate Physical Design Engineer with deep expertise in multi-voltage and low-power SoC design to join our team driving the next frontier of AI silicon. In this role, you will architect and optimize the power intent and delivery networks that form the backbone of our accelerators, own the development and automation of UPF and power grid flows, define and deploy EMIR methodologies, and collaborate with a world-class team to deliver robust, scalable power solutions for the most advanced chips on the planet.

This role is hybrid, based out of Santa Clara, CA, Austin, TX, or Fort Collins, CO.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A passionate innovator in low-power and multi-voltage SoC design, eager to push the boundaries of AI and high-performance silicon.
• Skilled at unraveling tough UPF and power grid challenges in complex, next-generation digital systems.
• Collaborative, thriving in dynamic environments and energized by cross-team problem-solving in fast-paced hardware teams.
• Relentlessly detail-oriented and driven to reinvent flows through automation, with an eye for both quality and scalability.

What We Need

• 5+ years of hands-on experience in CAD, methodology, or physical design for multi-voltage and low-power SoCs.
• Mastery of UPF-based power intent, power grid architecture, and EMIR analysis using the industry's most advanced toolsets (RedHawk, Voltus, etc.).
• Advanced scripting abilities (Tcl, Python, Perl) for architecting resilient, automated flows.
• Proven impact delivering robust solutions on leading-edge FinFET nodes, across the complete RTL-to-GDSII lifecycle.

What You Will Learn

• How to craft scalable multi-voltage and low-power design flows for Tenstorrent’s breakthrough AI/ML accelerators and silicon platforms.
• State-of-the-art techniques in power grid construction and EMIR sign-off—defining best practices for tomorrow’s most advanced SoCs.
• Influence tooling and methodologies through direct collaboration with world-class EDA partners and silicon architects.
• How industry-shaping ideas are brought from whiteboard to wafer—and see your solutions power the next wave of AI innovation.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.